IEEE 1076.1-2007 IEEE Standard VHDL Analog and Mixed-Signal Extensions

standard by IEEE, 11/15/2007

Full Description

Scope

This standard defines the IEEE 1076.1¿¿¿language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on the IEEE 1076¿¿¿(VHDL) language and extends it to provide capabilities of writing andsimulating analog and mixed-signal models.

Purpose

To provide a comprehensive mixed-signal description and simulationcapabilities as an extension to the IEEE VHDL 1076 language. Therevision corrects editorial errors and clarifies aspects of the languagedefinition in the 1076.1-1999 standard, and updates the 1076.1-1999standard to reflect changes in the VHDL 1076-2002 specification.

Abstract

Revision Standard - Superseded.This standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-1993 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models.

Product Details

Published: 11/15/2007 ISBN(s): 9780738156286 Number of Pages: 328 File Size: 1 file , 830 KB Product Code(s): STDSU95694